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Sr. FPGA Verification Engineer

at Virtual Instruments in San Jose, CA   —   Jul 10, 2014   |  
San Jose HeadquartersProduct of the YearVI Core ValuesForbes Most Promising Companies
Virtual Instruments, a fast-growing leader in virtual infrastructure optimization solutions for the Global 2000, seeks highly talented people to join our growing team, where your contributions will impact the development and delivery of our product roadmap. Our award-winning VirtualWisdom platform provides the only real-time, system-wide, enterprise scale solution for providing visibility into performance, health and utilization metrics, translating into improved performance and availability while lowering the total cost of the infrastructure supporting mission-critical applications.

We are looking for highly talented, proven individuals to join the hardware engineering department that is designing next generation products.
Lead the implementation of our verification environment, models, test scripts and tools for FPGAs on Virtual Instrument's next generation network hardware
Design behavioral functional models (BFM), monitors, and traffic generators for PCIe, Fibre Channel, Ethernet and TCP/IP
Document test plans and present to group
7-10+ years of FPGA/ASIC verification experience
Experienced in System Verilog, Perl, and Python
Experience in OVM/UVM, C/C++ is a plus
Experience designing self-checking test environments using object-oriented methodology
Hands on experience with lab debug of FPGAs on hardware platform is a plus
Experience in networking (8b/10b,64/66)
Experience with network processors is a plus
Ability to plan and execute on project milestones
Strong problem solving and communication skills
This position will be based out of the corporate headquarters location in San Jose, CA.
BS in Electrical Engineering or equivalent, MS preferred
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